Senior Design Team sample • Sample SD Site

Project Overview

The goal of this project is to create an ASIC for guitar pedals that is scalable and would allow for multiple different sound effects. The project aims to eliminate waste by minimizing the number of guitar pedals one needs to perform multiple sound effects. This project will focus on building the circuit through individual module design in Verilog, and synthesis, where a layout of a PCB with all our design components will be created and fabricated.


Team Members

Jonathan Hess

Scrum Master

Computer Engineer

Samuel Heikens

Master Scribe

Electrical Engineer

Yu Wei Tan

Systems Engineer

Electrical Engineer

Haris Khan

Digital Design

Computer Engineer





Weekly Reports (First Semester)

Weekly Report 1
Weekly Report 2
Weekly Report 3
Weekly Report 4
Weekly Report 5



Bi-weekly Reports (Second Semester)

Bi-weekly Report 1
Bi-weekly Report 2
Bi-weekly Report 3
Bi-weekly Report 4



Design Documents & Presentation

Design Document
Design Presentation



Final Deliverables

Final Design Document
Final Presentation
Final Design Demo
Final Poster